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Fixed rotated circuits ports

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This commit is contained in:
MysaaJava 2024-05-20 15:24:07 +02:00
parent a5cbf1d7b2
commit 98303dd4d1
Signed by: Mysaa
GPG Key ID: DBA23608F23F5A10
1 changed files with 49 additions and 47 deletions
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96
circuits.lua
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@ -85,6 +85,50 @@ function logikraft.collapseConnections(connz)
do end
end
-- side: left = 3, top = 0, right = 1, bottom = 2
local function registerPort(pos,side,j,dir,h,w)
local a =
(side == 0 and (j-1)) or
(side == 1 and (w-1)) or
(side == 2 and (j-1)) or
(side == 3 and 0) or
nil
local b =
(side == 0 and (h-1)) or
(side == 1 and (j-1)) or
(side == 2 and 0) or
(side == 3 and (j-1)) or
nil
local d = math.fmod(side + dir + 1,2)
local out =
(dir == 0 and {x=pos.x+a,y=pos.y,z=pos.z+b,d=d}) or
(dir == 1 and {x=pos.x+b,y=pos.y,z=pos.z-a,d=d}) or
(dir == 2 and {x=pos.x-a,y=pos.y,z=pos.z-b,d=d}) or
(dir == 3 and {x=pos.x-b,y=pos.y,z=pos.z+a,d=d}) or
nil
out.x = (math.fmod(side + dir,4)==3 and out.x-1) or out.x
out.z = (math.fmod(side + dir,4)==2 and out.z-1) or out.z
return out
end
local function registerComponentPorts(pos,component,ports,dir)
-- Left
local dirz = {
[0] = component.ports.top,
[1] = component.ports.right,
[2] = component.ports.bottom,
[3] = component.ports.left
}
for side,prts in pairs(dirz)
do
for j,n in pairs(prts)
do
ports[n] = registerPort(pos,side,j,dir,component.height,component.width)
end
end
end
-- {x,y,z,d=0 if x+, 1 if z+}
function logikraft.compileCircuit(poz)
@ -123,50 +167,9 @@ function logikraft.compileCircuit(poz)
then
local component = logikraft.components[cpblock.name]
local cp = {type = cpblock.name, ports = {}, pos = pos}
-- Left
if component.ports.left
then
for j,n in pairs(component.ports.left)
do
if n
then
cp.ports[n] = {x=pos.x-1,y=pos.y,z=pos.z+j-1,d=0}
end
end
end
-- Right
if component.ports.right
then
for j,n in pairs(component.ports.right)
do
if n
then
cp.ports[n] = {x=pos.x+component.width-1,y=pos.y,z=pos.z+j-1,d=0}
end
end
end
-- Top
if component.ports.top
then
for j,n in pairs(component.ports.top)
do
if n
then
cp.ports[n] = {x=pos.x+j-1,y=pos.y,z=pos.z+component.height-1,d=1}
end
end
end
-- Bottom
if component.ports.bottom
then
for j,n in pairs(component.ports.bottom)
do
if n
then
cp.ports[n] = {x=pos.x+j-1,y=pos.y,z=pos.z-1,d=1}
end
end
end
registerComponentPorts(pos,component,cp.ports,node.param2)
-- If we have a meta name, we save it
local meta = minetest.get_meta(pos)
if meta:get_string("logikraft:name") ~= ""
@ -178,6 +181,7 @@ function logikraft.compileCircuit(poz)
-- else we just ignore
end
end
print(dump(components))
logikraft.collapseConnections(connections)
@ -228,7 +232,7 @@ function logikraft.compileCircuit(poz)
-- TODO sort components in inferred components order, for faster computing
--[[
--
print("Discovered:")
print(dump(cleanedComponents))
print(dump(inputs))
@ -258,8 +262,6 @@ local function computeStep(circuit,connvals,computed)
then
local output = logikraft.components[cmp.type].compute(inputs)
print("Component "..cmp.type)
print(dump(inputs))
print(dump(output))
for name,v in pairs(output)
do
if cmp.ports[name] and connvals[cmp.ports[name]]